变形镜驱动器控制电路的设计  

Design of control circuit for deformable mirror driver

作　　者：李正东[1,2] 周志强[1,2] 袁学文[1,2] 刘章文[1,2] 

机构地区：[1]中国工程物理研究院应用电子学研究所,四川绵阳621900 [2]中国工程物理研究院高能激光科学与技术重点实验室,四川绵阳621900

出　　处：《现代电子技术》2017年第22期125-130,共6页Modern Electronics Technique

基　　金：国家高技术研究发展计划(AA20158022006)资助项目

摘　　要：96通道变形镜驱动器内含6个驱动模块,每个驱动模块含有16个输出通道,为了更加有效地管理控制这6个驱动模块,并实现与上位机、图像处理模块的交互通信,设计了变形镜驱动器控制电路。该电路包含了硬件设计和软件设计,其中硬件设计包含了电源设计、接口设计和FPGA设计,旨在实现高速向CPCI总线传输来自SPI接口的驱动矢量数据,同时把这些数据以适当的速度发给上位机。软件设计包括FPGA程序和NIOS系统程序设计,其中NIOS程序旨在实现上位机对上位机指令或数据的接收、处理和发送,以及对系统参数的配置以及驱动模块参数的保存等。结果表明,该电路不仅能够以200 f/s的速率正确接收并发送来自图像处理模块的驱动矢量数据,还能够正确收发来自上位机网口或者串口的控制指令,实现单通道与驱动矢量的切换、驱动矢量数据源的切换、单通道电压设置、放大器参数调试和保存以及通道数据读取、回传等功能,达到了预定的设计目标。The 96-channel deformable mirror driver includes 6 driver modules,and each module has 16 output channels.In order to manage the 6 driver modules more efficiently,and realize the interactive communication with the upper computer and image processing module,a control circuit of the deformable mirror driver was designed.The hardware design and software design of the circuit are introduced.The hardware design contains the power supply design,interface design and FPGA design,which can transmit the driving vector data from SPI to CPCI bus in high speed,and send the data to the upper computer with proper speed.The software design includes the FPGA program design and NIOS system program design.The NIOS program is used to receive,process and send the instructions or data of the upper computer,configure the system parameters,and save the parameters of the driving module.The experimental results show that the circuit can accurately receive and send the driving vector data from the image processing module with the speed of 200 f/s,correctly transmit and receive the control instructions from the network interface or serial port of the upper computer,and realize the switchover between the single channel and driving vector,switchover between the driving vector data,voltage set of single channel,amplifier parameter debugging and saving,read and postback of the channel data.It achieves the scheduled design target.

关 键 词：变形镜 控制电路 硬件设计 软件设计 FPGA NIOS系统 

分 类 号：TN911-34[电子电信—通信与信息系统]