用于NAND FLASH的纠检错算法的FPGA实现  

FPGA Implementation of Error Detection and Correction Algorithm in NAND FLASH

作　　者：郑晶晶[1] 袁素春[1] 王娜[1] 孙钰林[1] 

机构地区：[1]中国空间技术研究院西安分院,西安710000

出　　处：《空间电子技术》2017年第5期99-102,共4页Space Electronic Technology

摘　　要：提出了一种基于FPGA的纠检错实现方法,具有简单有效且FPGA资源占用少的特点。该方法已经应用于多个型号任务,并对其他使用NAND FLASH作为存储设备的卫星也具有较大参考意义和应用前景。This paper presents a method of error correction based on FPGA,which has the characteristics of simple,effective and less FPGA resources. The method has been applied to many model tasks,and has great reference significance and application prospects to the use of NAND flash as the storage device of other satellites.

关 键 词：NAND闪存 纠错码 现场可编程门阵列 

分 类 号：V474[航空宇航科学与技术—飞行器设计]