Modeling the impact of process and operation variations on the soft error rate of digital circuits  

作　　者：Ruiqiang SONG Shuming CHEN Bin LIANG Yaqing CHI Jianjun CHEN 

机构地区：[1]College of Computer, National University of Defense Technology, Changsha 410073, China

出　　处：《Science China(Information Sciences)》2017年第12期282-284,共3页中国科学（信息科学）（英文版）

基　　金：supported by National Natural Science Foundation of China(Grant Nos.61376109,61434007)

摘　　要：Dear editor,Process or operation variations are important factors in the soft error rate（SER）of integrated circuits[1,2].During manufacturing or other operations,inevitable process or operation variations lead to changes in the electrical parameters of transistors,which can result in sizeable shifts in the SER of integrated circuits[3].Some studies have reported that the hardness of test chips can vary by more than 20%as a result of process or operation variations[4].Therefore,it is vital to accountDear editor,Process or operation variations are important factors in the soft error rate（SER）of integrated circuits[1,2].During manufacturing or other operations,inevitable process or operation variations lead to changes in the electrical parameters of transistors,which can result in sizeable shifts in the SER of integrated circuits[3].Some studies have reported that the hardness of test chips can vary by more than 20%as a result of process or operation variations[4].Therefore,it is vital to account

关 键 词：circuits inevitable VITAL EDITOR hardness operations CHIPS TCAD instance MATCH 

分 类 号：TN79[电子电信—电路与系统] TP332[自动化与计算机技术—计算机系统结构]