变形镜驱动器驱动电路的设计  

Design of drive circuit for deformable mirror driver

作　　者：李正东[1,2] 周志强[1,2] 袁学文[1,2] 刘章文[1,2] 

机构地区：[1]中国工程物理研究院应用电子学研究所,四川绵阳621900 [2]中国工程物理研究院高能激光科学与技术重点实验室,四川绵阳621900

出　　处：《现代电子技术》2017年第24期169-174,共6页Modern Electronics Technique

基　　金：国家高技术研究发展计划资助项目(AA20158022006)

摘　　要：为了实现多通道变形镜驱动和控制,设计由6组模块组成的变形镜驱动器。其中每块模块包括硬件部分和软件部分,硬件部分设计包含电源设计、接口设计、D/A转换及放大设计和FPGA设计,其旨在接收驱动电压组成的矢量数据,并把这些数字信号经D/A芯片转换成模拟电压,随后经射随和高压放大电路输出,作为变形镜陶瓷单元的驱动电压。软件部分设计包含FPGA设计和NIOS设计,其中FPGA从矢量驱动数据中提取属于该驱动模块16个通道的驱动电压,并把每个通道的驱动电压,按D/A转换芯片的时序要求,以串行方式把数据发送给对应的D/A芯片,完成对变形镜陶瓷单元驱动电压的输出。NIOS程序旨在实现对上位机指令的处理和反馈,完成对驱动模块参数的配置、调试和保存以及数据源切换、通道电压设置等功能。实验表明,变形镜驱动器不仅能以200 f/s的速率对96单元变形的镜波前校正功能进行控制,而且能够正确完成与上位机的信息交互。In order to drive and control the multi-channel deformable mirror, a deformable mirror driver composed of six- group modules was designed. The each module is composed of hardware and software. The hardware design includes the power supply design, interface design, D/A conversion and amplification design, and FPGA design, which is aimed at receiving the vector data composed of drive voltage, and converting the digital signals into the analog voltage through D/A chip. And then the analog voltage output by the emitter follower and high-vohage amplifying circuit is taken as the drive voltage of the deformable mirror ceramic unit. The software design includes the FPGA design and NIOS design. The 16-channel drive voltage of the drive module is extracted in the vector drive data through FPGA, and sent to the corresponding D/A chip in the serial mode according to the time serial requirement, so as to output the drive voltage of the deformable mirror ceramic unit. The NIOS program is aimed to process and feed the command from the upper computer; and realize the configuration, debugging and saving of the drive module parameters, data source switchover and channel voltage setting. The experimental results show that the deformable mirror driver can control the wavefront correction function of the 96-unit deformable mirror with the frequency of 200 f/s, and realize the information interaction with the upper computer correctly.

关 键 词：变形镜 驱动电路 硬件设计 软件设计 FPGA NIOS系统 

分 类 号：TN247[电子电信—物理电子学]