考虑峰值温度和TSV数目的三维集成电路芯片的布图规划方法研究  

Research on Layout Planning Method Considering Peak Temperature and the Number of TSVs for 3D Integrated Circuits

作　　者：班涛[1] 潘中良[1] 陈倩[1] 

机构地区：[1]华南师范大学物理与电信工程学院,广东广州510006

出　　处：《数字技术与应用》2017年第12期103-105,共3页Digital Technology & Application

基　　金：广东省科技计划项目(2016B090918071;2014A040401076);国家自然科学基金(61072028);广东省自然科学基金(2014A030313441);广州市科技计划项目(201510010169)

摘　　要：三维集成电路相对于传统的集成电路可以持续并较好地实现高密度和多功能,可以使电路中的一些信号互连缩短,并加快信号的传输速度。三维芯片层间的互连是通过硅通孔来实现的,所采用的垂直堆叠方式会使芯片的功耗密度增加,从而使得发热量急剧增长。本文针对三维电路芯片的工作温度、TSV数目、互连线长度以及芯片面积等因素,研究了一种协同考虑芯片峰值温度和TSV数目的三维芯片布图算法,可以使所设计的三维电路芯片不仅它的峰值温度符合设计规范的要求,而且所使用的TSV数目较少。The 3D integrated circuits can implement high component integration and multiple functions,can shorten the length of signal lines,and speed up transferring rate.The interconnects among chip layers in three-dimensions integrated circuits are realized by through silicon via（TSV）,The vertical stacking strategy used can multiply the power dissipation density of chip,resulting in a sharp increase in thermal value.This paper aims at the following aspects：working temperature of chip,the number of TSVs,the length of connection lines and area of chip,investigates the layout planning method considering peak temperature and the number of TSVs.This method can make the designed three-dimensional circuit chips not only its peak temperature meets the requirements of design specifications,but also the number of TSVs used is less.

关 键 词：三维集成电路 硅通孔 峰值温度 布图规划 热分析 

分 类 号：TN402[电子电信—微电子学与固体电子学]