基于FPGA的星载一体化高速数据复接器设计  

Design of spaceborne integrated high-speed data multiplexer based on FPGA

作　　者：许志宏 董振兴 安军社 XU Zhi-hong1,2, DONG Zhen-xing1,2, AN Jun-she1(1. The National Space Science Center of Chinese Academy of Sciences, Beijing 1 00190, China ; 2. University of the Chinese Academy of Sciences ,Beijing 100190, Chin)

机构地区：[1]中国科学院国家空间科学中心,北京100190 [2]中国科学院大学,北京100190

出　　处：《电子设计工程》2018年第5期184-188,193,共6页Electronic Design Engineering

基　　金：中国科学院空间科学战略性科技先导卫星专项(XDA04040201)

摘　　要：为了解决卫星有效载荷种类不断增多和数据传输速率不断提高与卫星数据处理和传输能力不足之间的矛盾,提出了一种满足国际空间数据系统咨询委员会(CCSDS)建议的高级在轨系统(AOS)体制的高速数据复接器设计方案。该方案能够实现高速载荷数据接收合路、NAND flash大容量数据存储控制、数据复接,数据信道低密度奇偶校验编码(LDPC)等功能。设计过程中对电路进行优化,实现了高速并行数据处理和高可靠性目标。通过FPGA的原型验证,本方案设计合理,性能指标能够满足未来卫星载荷数据处理要求。In order to solve the contradiction between increasing types of satellite payload and increasing data transmission rate and satellite data processing and transmission capacity, A high-speed data multiplexer design scheme for advanced on-orbit system （AOS） system that meets the recommendations of the International Spatial Data Systems Advisory Committee （CCSDS） is proposed. The scheme can realize the functions of high speed load data receiving and combining, NAND flash large capacity data storage control, data multiplexing and data channel low density parity check coding （LDPC）. During the design process, the circuit is optimized to achieve high-speed parallel data processing and high reliability targets. Through the FPGA prototype verification, the scheme is designed reasonably and the performance index can meet the future satellite data processing requirements.

关 键 词：CCSDS 大容量存储 复接器 LDPC编码 FPGA 

分 类 号：TN79[电子电信—电路与系统]