Impact of self-heating effects on nanoscale Ge p-channel Fin FETs with Si substrate  

作　　者：Longxiang YIN Lei SHEN Hai JIANG Gang DU Xiaoyan LIU 

机构地区：[1]Institute of Microelectronics, Peking University

出　　处：《Science China(Information Sciences)》2018年第6期169-177,共9页中国科学（信息科学）（英文版）

基　　金：supported by National Natural Science Foundation of China(Grant Nos.61404005,61674008,61421005);National High Technology Research and Development Program of China(863)(Grant No.2015AA016501)

摘　　要：In this paper, self-heating effects（SHE） in nanoscale Ge p-channel Fin FETs with Si substrate are evaluated by TCAD simulation. Hydrodynamic transport with modified mobilities and Fourier′s law of heat conduction with modified thermal conductivities are used in the simulation. Ge p-channel single-fin Fin FET devices with different S/D extension lengths and fin heights, and multi-fin Fin FETs with different fin numbers and fin pitches are successively investigated. Boundary thermal resistances at source, drain and gate contacts are set to 2000 μm;K/W and the substrate thermal boundary condition is set to 300 K so that the source and drain heat dissipation paths are the first two heat dissipation paths. The results are listed below:（i） 14 nm Ge p-channel single-fin Fin FETs with a 47 nm fin pitch experience 9.7% on-state current degradation.（ii） Considering the same input power, Fin FETs with a longer S/D extension length show a higher lattice temperature and a larger on-state current degradation.（iii） Considering the same input power, Fin FETs with a taller fin height show a higher lattice temperature.（iv） The temperature in multi-fin Fin FET devices will first increase then saturate with the increasing fin number. At last, thermal resistances in Ge p-channel single-fin Fin FETs and multi-fin Fin FETs are investigated.In this paper, self-heating effects(SHE) in nanoscale Ge p-channel Fin FETs with Si substrate are evaluated by TCAD simulation. Hydrodynamic transport with modified mobilities and Fourier′s law of heat conduction with modified thermal conductivities are used in the simulation. Ge p-channel single-fin Fin FET devices with different S/D extension lengths and fin heights, and multi-fin Fin FETs with different fin numbers and fin pitches are successively investigated. Boundary thermal resistances at source, drain and gate contacts are set to 2000 μm^2 K/W and the substrate thermal boundary condition is set to 300 K so that the source and drain heat dissipation paths are the first two heat dissipation paths. The results are listed below:(i) 14 nm Ge p-channel single-fin Fin FETs with a 47 nm fin pitch experience 9.7% on-state current degradation.(ii) Considering the same input power, Fin FETs with a longer S/D extension length show a higher lattice temperature and a larger on-state current degradation.(iii) Considering the same input power, Fin FETs with a taller fin height show a higher lattice temperature.(iv) The temperature in multi-fin Fin FET devices will first increase then saturate with the increasing fin number. At last, thermal resistances in Ge p-channel single-fin Fin FETs and multi-fin Fin FETs are investigated.

关 键 词：GERMANIUM Fin FET self-heating effect thermal resistance TCAD 

分 类 号：TK124[动力工程及工程热物理—工程热物理] TN386[动力工程及工程热物理—热能工程]