基于双交叉耦合电容反馈的超低功耗高线性LNA  

An Ultra-low-power High-linearity LNA with Dual Cross-coupled Capacitive Feedback

作　　者：李相敏[1] 康壮[1] LI Xiang-min;KANG Zhuang(Yangtze University College of Arts and Sciences, Jingzhou 434020, Chin)

机构地区：[1]长江大学文理学院,湖北荆州434020

出　　处：《中国电子科学研究院学报》2018年第3期326-330,共5页Journal of China Academy of Electronics and Information Technology

基　　金：湖北省教育厅科研处"基于物联网的家庭医疗保健系统的研究和设计"项目(鄂科教函【2016】13号)

摘　　要：提出了一种基于双交叉耦合电容反馈技术的CMOS共栅低噪声放大器(LNA)。第一个反馈环路利用交叉耦合技术以提高电路跨导;另一个反馈环路在晶体管的源漏两级之间采用交叉耦合共栅技术实现电压电流反馈。提出的LNA在低功耗的前提下取得了优越的性能,基于0.18μm CMOS工艺,对该LNA流片实现并测试。测试结果表明LNA芯片在2.4 GHz频率下的增益为18 d B,噪声系数为2.02 d B,输入三阶截止点IIP3为8.3 d Bm,输入匹配参数S11和输出匹配参数S22均低于-10 d B,在1.1 V电压供电下功耗为2.5 m W。A CMOS common gate low noise amplifier（ LNA） with dual-cross-coupled-capacitive feedback is proposed. The first feedback loop is designed for transcoductance boosting which is widely known as the cross-coupled common gate（ CCCG） topology. The other feedback loop is voltage-current feedback by cross-coupling between the drain node and the source node in the common gate topology. The proposed LNA achieves excellent performance with low power consumption. The LNA is implemented with a0. 18 μm CMOS process and measured. The measured results demonstrate a gain of 18 d B,a noise figure（ NF） of 2. 02 d B,an input third-order intercept point（ IIP3） of 8. 3 d Bm,an input matching（ S11）/output matching（ S22） of less than 10 d B at 2. 4 GHz,and a power consumption of 2. 5 m W with 1. 1 V supply voltage.

关 键 词：输入三阶截止点 高线性 低噪声放大器 负反馈 

分 类 号：TN432[电子电信—微电子学与固体电子学]