基于FPGA和单片机的扫频信号源的设计  

Design of Scan Frequency Signal Source Based on FPGA and MCU

作　　者：段惠敏[1] 周泽华[1] 查长军[1] 桂金瑶[1] DUAN Hui-min;ZHOU Ze-hua;ZHA Chang-jun;GUI Jin-yao(Department of Electronic Information and Electrical Engineering,Hefei University,Hefei 230601,Anhui,China)

机构地区：[1]合肥学院电子信息与电气工程系,合肥230601

出　　处：《合肥学院学报（综合版）》2018年第2期51-55,共5页Journal of Hefei University：Comprehensive ED

基　　金：安徽高校省级自然科学研究重点项目(KJ2017A531);安徽省质量工程大规模在线开放课程示范项目(2015mooc075);安徽省质量工程大学生创客实验室建设计划项目(2016ckjh158);合肥学院科研基金项目(17ZR02ZD)资助

摘　　要：针对目前扫频信号源的扫速调整复杂性问题,提出了一种可快速调整步进长度的方法,以Alter公司CycloneⅡFPGA为核心完成DDS直接数字频率合成计,以ATmega128 AVR单片机为控制器调整频率控制字K值,从而改变DDS累加器的相位增量,完成步进单位和输出频率的设置。测试表明,本系统不但能以10nHz(n=0,1,2,3,4,5,6)为步进单位从1Hz^11MHz循环输出,也可设置1Hz^11MHz间任意整数的点频输出,而且大大降低了误差,输出信号波形质量优良,较传统扫频信号源能更好满足不同精度的频率特性测试需求。In order to solve the complexity of scanning speed adjustment about scan frequency signal source,a method of fast adjusting step length is proposed in the paper. CycloneⅡFPGA is the core to complete the DDS direct digtial frequency syntheesizer. The ATmega128 AVR is used as the controller to adjust the frequency control word K,so as to change the phase increment and complete the setting of step unit and output frequency. Test results show that the system can not only take 10 n（ n = 0,1,2,3,4,5,6） as the stepping unit for cycle output from 1 Hz to 11 MHz. The ring output can also set the point frequency output of arbitary whole application from 1 HZ to 11 MHZ,but also greatly reduces the error. Compared with the traditional scan frequency signal source,the signal source can meet the requirement of frequency characteristic testing with different precision.

关 键 词：扫频 信号源 DDS 步进 

分 类 号：TM935[电气工程—电力电子与电力传动]