一种高速高宽带主从式采样保持电路  

High-speed high-broadband master-slave sampling and hold circuit

作　　者：丁浩[1,2] 王建业 刘伟[2] 熊永忠 DING Hao;WANG Jianye;LIU Wei;XIONG Yongzhong(School of Graduate,Air Force Engineering Univ.,Xi＇an 710000,China;Chengdu Chipzone Tech Co.,Ltd.,Chengdu 610200,China)

机构地区：[1]空军工程大学研究生院,陕西西安710000 [2]成都聚利中宇科技有限公司,四川成都610200

出　　处：《西安电子科技大学学报》2018年第4期123-128,共6页Journal of Xidian University

摘　　要：基于0.13μm SiGe BiCMOS工艺设计并实现了一种新型高速高宽带主从式采样保持电路.该电路采用PMOS源极跟随器作输入级实现了直流耦合,使得低频、低偏置电压信号也可以被正常采样.采用Cherry-Hooper放大器将带宽提升至18GHz.通过主从式采样结构和交叉耦合电容消除了信号馈通,使用互补三极管抵消了时钟馈通的影响,将无杂散动态范围控制在33~38dB.对比结果表明,这种设计方案在带宽方面具有较大的优势,并且具有较高的采样率.This paper presents a new-style high-speed broadband master-slave sampling and hold circuit based on the 0.13μm SiGe BiCMOS.In order to realize DC coupling and sample the low-frequency lowoffset-voltage signal,the PMOS source follower is used in the input stage.The Cherry-Hooper structure is used to expand the bandwidth up to 18 GHz.Signal feedthrough is cancelled by the master-slave sampling structure and cross-coupled capacitors.Clock feedthrough is attenuated by complementary bipolar transistors.The spurious free dynamic range is 33~ 38 dB.Comparison results show that the proposed circuit has a big advantage in bandwidth and is able to sample at a high sampling rate.

关 键 词：高速高宽带 主从式采样 采样保持电路 信号馈通 时钟馈通 模数转换器 

分 类 号：TN432[电子电信—微电子学与固体电子学]