一种应用于CHPAV2.0的高速EoC Tuner芯片  

A High Speed EoC Tuner Chip for CHPAV2.0

作　　者：廖友春[1,2] 张钊锋 程帅[2] 黄兆磊 李娟[1] LIAO Youchun;ZHANG Zhaofeng;CHENG Shuai;HUANG Zhaolei;LI Juan(Shanghai Advanced Research Institute,Chinese Academy of Sciences,Shanghai 201210,P.R.China;University of Chinese Academy of Sciences,Beijing 100049,P.R.China)

机构地区：[1]中国科学院上海高等研究院,上海201210 [2]中国科学院大学,北京100049

出　　处：《微电子学》2018年第4期491-495,共5页Microelectronics

基　　金：上海市科委基金资助项目(12DZ1500900;13511502600)

摘　　要：设计了一种用于C-HomePlug AV(CHPAV)2.0标准同轴以太网系统的低中频宽带射频收发器芯片。该芯片支持的射频频率范围为0.3~1.3GHz,中频最高支持300 MHz带宽。芯片集成双LNA和双PA,提供灵活的增益配置,并有利于噪声与线性度的折中优化。同时,集成了整数分频频率合成器和数字控制接口。芯片采用TSMC 0.13μm CMOS工艺实现。仿真结果表明,接收链路最大增益为40dB,发射功率最高达10dBm,在3.3V电源供电下,接收和发射模式的最大功耗分别为64mA和118mA。A low-IF wide-band RF transceiver chip was designed for C-HomePlug AV（CHPAV）2.0 standard Ethernet over Cable（EoC）system application.The chip supported a RF frequency range of 0.3-1.3 GHz,with a maximum IF frequency of 300 MHz.Double LNAs and double PAs were integrated for flexible gain control and optimized noise/linearity trade-off.An integer-N PLL and a digital control interface were integrated as well.The chip was fabricated in TSMC 0.13μm CMOS process.The simulation results showed that the maximum gain of the receiver was 40 dB while the maximum transmitter power was 10 dBm.The receiver and transmitter mode dissipated 64 mA and 118 mA current respectively at a single 3.3 Vsupply.

关 键 词：宽带收发器 CHPAV2.0 同轴以太网 低功耗 CMOS射频集成电路 

分 类 号：TN432[电子电信—微电子学与固体电子学]