一种有源自偏置的Ku波段CMOS低噪声放大器  

An Active Self-biased Ku-band CMOS Low Noise Amplifier

作　　者：钱江浩 谢生 毛陆虹 李海鸥[2] Qian Jianghao;Xie Sheng;Mao Luhong;Li Haiou(Tianjin Key Laboratory of Imaging and Sensing Microelectronic Technology,School of Microelectronics,Tianjin University,Tianjin 300072,China;Guangxi Key Laboratory of Precision Navigation Technology and Application,Guilin University of Electronics Technology,Guilin 541004,China)

机构地区：[1]天津大学微电子学院天津市成像与感知微电子技术重点实验室,天津300072 [2]桂林电子科技大学广西精确导航技术和应用重点实验室,广西桂林541004

出　　处：《南开大学学报（自然科学版）》2018年第4期68-72,共5页Acta Scientiarum Naturalium Universitatis Nankaiensis

摘　　要：基于源简并电感共源共栅结构,设计了1种有源自偏置低噪声放大器,既可消除偏置电路功耗,又能克服无源自偏置噪声较高的缺点;另外利用键合线作为高Q值电感元件,进一步降低噪声系数并减小芯片面积.所设计低噪声放大器采用TSMC 0.18μm CMOS工艺进行优化设计并流水制备.仿真结果表明,在12-16GHz频段内,噪声系数NF低于3.2 d B,输入3阶交调点IIP3为1.573 d Bm.研制芯片面积为540μm×360μm,在1.8 V电压下,消耗16 m A电流.结果表明芯片测试实现在12.2-15.5 GHz频段上,输入输出反射性能良好,正向增益S_(21)>6 d B,反向隔离度S_(12)<-32.5 d B.An active self-biased low noise amplifier（LNA） based on source inductance degeneration cascode structure is proposed, to eliminate the power consumption of bias circuit and overcome the noise induced by passive self-bias technique. Bond wire was utilized as high-quality inductor to realize further low noise and decrease chip area. The designed LNA was optimized and fabricated in TSMC 0.18 μm CMOS process with chip area of 540 μm×360 μm. Simulated noise figure（NF） below 3.2 d B, and inputreferred third-order intercept point（IIP3） of 1.573 d Bm are achieved in 12-16 GHz. Measured S21 above 6 d B, S11 below-10 d B, S22 below-9 d B, and S（12） of lower than-32.5 d B are realized in 12.2-15.5 GHz.

关 键 词：低噪声放大器 CMOS 共源共栅 有源自偏置技术 键合线电感 

分 类 号：TN722.3[电子电信—电路与系统]