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作 者:李建平[1] 凌志健 LI Jianping;LING Zhijian(Nanj ing Electronic Devices Institute,Nanj ing,210016,CHN)
出 处:《固体电子学研究与进展》2018年第4期257-261,共5页Research & Progress of SSE
摘 要:设计了L波段PIN限幅器芯片和低噪声放大器芯片,并将这两种芯片集成在载板上,组成小尺寸双平衡限幅低噪声放大器。低噪声放大器采用负反馈结构,降低噪声系数和改善增益平坦度。采用双平衡式结构,提高限幅器的功率容量,提高了1dB增益压缩点输出功率。对传统兰格桥结构作了改进,缩小了电路面积。该限幅低噪声放大器工作电压5V,电流40mA。测试结果显示,在频带1.2~1.4GHz内,噪声系数小于1.2dB,增益大于28dB,P1dB大于6dBm,能够承受脉冲功率150 W(脉宽200μs和占空比为20%)。体积为7.5mm×5.0mm×0.9mm。An L-band PIN limiter and a low noise amplifier(LNA)were designed,and by using this two chips,a kind of the on-board miniaturized Balanced limiter low noise amplifier was presented.The negative feedback structure was adopted in the LNA to lower the noise and improve the gain flatness.The balanced structure was used to enhance the power tolerance of the limiter and increase the output power at 1 dB gain compression point.By modifying the traditional Lange bridge construction,the area of the circuit was decreased.Under the condition of 5 Vvoltage and 40 mA current,the measured results of the limiter LNA show that the noise figure is below 1.2 dB within the bandwidth 1.2~1.4 GHz,the small signal gain is higher than 28 dB,and output power at 1 dB gain compression point is more than 6 dBm;The limiter LNA can work in150 W pulse power with a pulse width of 200μs and a duty ratio of 20%.The dimension of module is 7.5 mm×5.0 mm×0.9 mm.
分 类 号:TN722.3[电子电信—电路与系统]
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