基于微处理器的可测性设计  

Design for Testability Based on Microprocessor

作　　者：徐国强[1] 王玉艳[1] 马鹏[1] 章建雄[1] 

机构地区：[1]华东计算技术研究所,上海200233

出　　处：《计算机工程》2002年第9期190-191,252,共3页Computer Engineering

摘　　要：由于微处理器结构复杂、测试困难,作者在微处理器设计中插入内建自测试(BIST)电路对指令译码部件的可编程逻辑阵列(PLA)电路和执行部件的控制只读存储器(CROM)电路进行测试。模拟结果表明,微处理器可分别在测试模式与正常工作模式下运行。在测试模式下,微处理器芯片中近40%的晶体管可用自检办法解决。Because of the complexity of the microprocessor structuing and the difficulty of its testing, the authors insert built-in-self-test (BIST) circuits in a microprocessor to test programmable-logic-array (PLA) in the instruction-decode unit and control-read-only-memory (CROM) in the execution unit. The results of simulation show that the microprocessor can run respectively in testing mode and normal operating mode. About 40 percent transistors in the microprocessor chip can be tested by self-testing in testing mode.

关 键 词：微处理器 可测性设计 线性反馈移位寄存器 数字集成电路 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]