三轴电容式微加速度计接口ASIC设计  

Design of interface ASIC for the capacitive 3-axis micro-accelerometer

作　　者：许高斌[1] 李新[1] 陈兴[1] 马渊明[1] 

机构地区：[1]合肥工业大学电子科学与应用物理学院安徽省MEMS工程技术研究中心,合肥230009

出　　处：《电子测量与仪器学报》2015年第7期978-987,共10页Journal of Electronic Measurement and Instrumentation

基　　金：国家863计划项目(2013AA041101)资助项目

摘　　要：基于CSMC0.5um CMOS工艺,给出了一款3轴电容式微加速度计接口ASIC的详细设计方案。利用时分复用技术实现了使用同一电路模块同时检测3个轴向的加速度信号,利用相关双倍采样技术提高了电容电压转换的分辨率,利用Sigma_Delta调制技术对电路噪声进行有效整形。仿真得到系统的分辨率为0.91 a F/Hz1/2,3个轴向的噪声密度分别为43.60μg/Hz1/2、43.60μg/Hz1/2和45.70μg/Hz1/2,3个轴向输出数字脉冲信号占空比的非线性度分别为1.38%、0.91%和1.79%。In this paper,a detailed design scheme of an interface ASIC for a capacitive 3-axis micro-accelerometer is presented based on CSMC0. 5um CMOS process. The acceleration of 3 axes can be detected simultaneously with the same circuit by using discrete-time multiplexed technology. The resolution of C to V is enhanced by using correlated double sampling. Using Sigma_Delta modulation technology can reduce the circuit noise. With a capacitive 3-axis accelerometer,the measured resolution of the system by simulation is 0. 91 a F / Hz1 /2,and the noise floors in the x-,y-,z-directions are 43. 60μg / Hz1 /2,43. 60μg /Hz1 /2,and 45. 70μg /Hz1 /2,respectively. The nonlinearity of duty cycle of 3-axis digital output is 1. 38%,0. 91%,and 1. 79%,respectively.

关 键 词：三轴微加速度计 接口ASIC 时分复用 相关双倍采样 Sigma_Delta 

分 类 号：TH824.4[机械工程—仪器科学与技术]