基于SystemVerilog语言的像素cache验证平台的实现  

Implementations of the pixel cache validation platform based on SystemVerilog language

作　　者：杨铮[1] 韩俊刚[1] 李卯良 刘欢 

机构地区：[1]西安邮电大学计算机学院,陕西西安710121 [2]西安邮电大学电子工程学院,陕西西安710121

出　　处：《电子技术应用》2016年第10期51-53,61,共4页Application of Electronic Technique

基　　金：国家自然科学基金重点资助项目(61136002);教育部科学研究计划重点资助项目(2111180)

摘　　要：以SystemVerilog为基础,对自主研发的GPU"萤火虫2号"中像素cache部分搭建可重用的验证平台。该平台可以自动完成整个验证过程,并将验证结果打印到Linux终端和文件当中,方便程序员检查验证结果。实验结果表明,该验证平台对像素cache的功能验证覆盖率可以达到100%,并且具有良好的可重用性,能够全面、正确地完成RTL级功能验证,有效地提高了验证的效率和质量。Based on System Verilog, build a reusable verification platform for GPU ' Firefly 2nd ' pixel cache which is the indepen-dent research and development of school. The platform can automatically complete the verification process, and print the results to a Linux terminal and file to facilitate the programmer checks to verify the results. Experimental results show that the functional verifi-cation coverage verification platform for pixel cache can be 100 % and have good reusable, fully and correctly complete RTL- level verification, and effectively improve the efficiency of the verification and quality.

关 键 词：像素cache 验证平台 SYSTEM VERILOG 可重用性 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]