位同步提取中相位抖动、同步带宽与倒π误锁  

Phase Quiver, Synchronous Bandwidth and Inverse it Mislock in Bit Synchronization Extraction

作　　者：孟凡定[1] 

机构地区：[1]华中理工大学电子与信息工程系

出　　处：《华中理工大学学报》1991年第A01期61-65,共5页Journal of Huazhong University of Science and Technology

摘　　要：本文论述了数字锁相环位同步提取的原理和防止倒π误锁的方法,在此基础上,对相位抖动、同步带宽的制约因素作了分析,提出了不同设计要求对调整步数的选取原则.实验结果与理论分析相吻合.The principle, the technique and the experimental data of extracting bit synchronous information using a digital phase-locked loop are given. The causes of mislock due to inverse frequently occurring in practice and the preventive measures are described at length. Constraints on phase quiver and synchronous bandwidth are discussed and the selection of numbers of adjusting steps for meeting different design requirements are proposed. Experimental results are in agreement with those of a theoretical analysis.

关 键 词：数字通信 位同步 数字锁相环 

分 类 号：TN919[电子电信—通信与信息系统]