基于垂直扩散的FPGA温度优化布局算法  

A Temperature-Aware FPGA Placement Based on Vertical Diffusion

作　　者：黄俊英[1,2] 林郁[1] 张超[1] 杨海钢[1] Huang Junying;Lin Yu;Zhang Chao;Yang Haigang(System on Programmable Chip Research Department, Institute of Electronics, Chinese Academy of Sciences, Beijing 100190;University of Chinese Academy of Sciences, Beijing 100190)

机构地区：[1]中国科学院电子学研究所可编程芯片与系统研究室,北京100190 [2]中国科学院大学,北京100190

出　　处：《计算机辅助设计与图形学学报》2017年第1期189-195,共7页Journal of Computer-Aided Design & Computer Graphics

基　　金：国家自然科学基金(61271149;61204045;61404140)

摘　　要：为减小FPGA热梯度的增加对芯片性能和可靠性的影响,提出一种基于垂直扩散的温度优化布局算法.首先,通过实验分析了芯片温度特性与芯片尺寸之间的关系;然后,根据布局后网表计算出过热区域,利用该区域边界及扩散系数构建温度优化布局算法,并引入局部位置调整机制解决逻辑块位置重叠问题.实验结果表明,与传统布局算法的芯片温度相比,在线长和延时平均仅增加3.4%和1.4%的情况下,该算法的峰值温度平均减小7.5%,热梯度平均减小20.3%.In this paper we propose an FPGA placement algorithm for temperature optimization based onvertical diffusion.It aims at reducing the effect of the increase in thermal gradient of FPGA on chip performanceand reliability.Firstly,we analyzed the relationship between chip size and the temperature andthermal gradient of the chip through experiments.Secondly,according to the placed net list,we computedthe hotspot region.Its boundary together with a diffusion coefficient was used to construct the proposedplacement algorithm.In addition,we provided an adjustment mechanism of local positions to remove overlapsbetween logic blocks.Experimental results show a7.5%and20.3%reduction on average in peak temperatureand thermal gradient respectively with a3.4%and1.4%increase in wire length and delay,incomparison with their counterparts in conventional placement algorithm.

关 键 词：可编程门阵列 布局算法 温度优化 热梯度 

分 类 号：TP302.1[自动化与计算机技术—计算机系统结构]