基于多核密码处理器的SHA2_512多分支结构映射  

Multi-branch of SHA2_512 mapping based on multi-core crypto-coprocessor

作　　者：倪海源 严迎建[1] 李伟[1] NI Hai-yuan;YAN Ying-jian;LI Wei(Information Engineering University, Zhengzhou 450001, China)

机构地区：[1]信息工程大学,河南郑州450000

出　　处：《计算机工程与设计》2017年第2期334-339,共6页Computer Engineering and Design

基　　金：国家自然科学基金项目(61404175)

摘　　要：为使SHA2_512(全文不统一)算法在单任务大数据的处理方式下能够获得较高的加密速度,研究一种基于多核密码处理器的SHA2_512实现方案。在关键路径上进行多分支结构映射的优化,实现单个密码算法在多个处理器上并行运行,减少加密单组数据所用的时钟周期数,提高加密效率。在多核密码处理器上实际运行,在芯片时钟频率为400 Mhz时,数据处理速度达2354 Mbps。To find a way to deal with the SHA2_512with single task and large data,enhance the running speed,an implementation of the SHA2_512based on multi-core crypto-coprocessor was studied.The structure of algorithm on the critical path was optimized using multi-branch structure to implement the single algorithm on multi-cores,the number of cycles was decreased and the performance was enhanced The chip works under a clock frequency of400Mhz when synthesized placed and routed in an multi-cores device and achieves a throughput of2354Mbps.

关 键 词：SHA2_512 单任务大数据 关键路径 多分支结构 多核密码处理器 

分 类 号：TP3097[自动化与计算机技术—计算机系统结构]