功率VDMOS(带氮化硅结构)的UIS失效改善  

UIS Failure Improvement of Power VDMOS(with SiN)

作　　者：冯超 王振宇[2] 郝志杰 FENG Chao;WANG Zhenyu;HAO Zhijie(CSMC Technologies Corporation,Wuxi 214000,China;School of Software&Microelectronics,PKU,Beijing 102600,China)

机构地区：[1]华润上华科技有限公司,江苏无锡214000 [2]北京大学软件与微电子学院,北京102600

出　　处：《电子与封装》2018年第8期44-48,共5页Electronics & Packaging

摘　　要：功率VDMOS器件是最为普遍的开关器件。而UIS发生过程是指功率VDMOS器件在整个系统中所能承受的最严峻电应力以及热应力的考验过程,所以抵抗UIS失效能力成为衡量其可靠性的重要指标。针对UIS的测试方法和机理做了简单的介绍,同时针对某款功率VDMOS产品的UIS改善方案进行了详细的描述。The device of power VDMOS is the most common switching device.While the UIS process refers to the power VDMOS device in the whole systemcan withstand the most severe test process of the electric stress and thermal stress,so the ability to resist the UIS failure has become an important indicator to measure its reliability.This paper briefly introduces the testing method and mechanism of UIS,and describes the UIS improvement scheme of a power VDMOSproduct in detail.

关 键 词：DMOS UIS 带氮化硅结构 

分 类 号：TN306[电子电信—物理电子学]