电阻层析成像系统的硬件设计  

Hardware Design of Electrical Resistance Tomography System

作　　者：张明超[1] ZHANG Ming-chao(College of Humanities&Science,Northeast Normal University,Changchun 130117,China)

机构地区：[1]东北师范大学人文学院吉林长春130117

出　　处：《仪表技术与传感器》2018年第9期84-87,109,共5页Instrument Technique and Sensor

摘　　要：电阻层析成像是利用多相介质具有不同的电导率,通过传感器测得数据,运用适当的算法重建电导率分布的一种过程层析成像技术。针对现有的成像技术存在的成本高、响应速度慢、不能测量导体的问题,设计了一种新型高精度电阻层析成像系统。硬件部分主要设计了DDS信号产生电路、电流源产生电路、微弱电压信号接收与调理电路、RS485通讯以及STM32F407和CPLD最小系统电路。实际实验搭建了固液两相流测量装置,结果表明该系统成像精度高、实时性好。Electrical resistance tomography utilizes the multi-phase medium having a different conductivity,obtains the measurement data by the sensor,and then uses appropriate imaging algorithms to reconstruct the conductivity distribution,thereby obtaining the distribution of each phase.A new type of high-precision resistive tomography system was designed for the existing imaging technology,which has high cost,slow response and cannot measure conductor.The hardware part mainly designed the DDS signal generation circuit,current source generation circuit,weak voltage signal receiving and conditioning circuit,RS485 communication and STM32F407 and CPLD minimum system circuit.The solid liquid two-phase flow measurement device was built in the actual experiment,and the results show that the system has high accuracy and good real-time performance.

关 键 词：电阻层析成像 电导率 DDS CPLD 

分 类 号：TP934[自动化与计算机技术]