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作 者:沈小虎[1] 吴伟[1] 王翠莲 SHEN Xiaohu;WU Wei;WANG Cuilian(Beijing Institute of Spacecraft System Engineering,Beijing 100094,China)
出 处:《航天器工程》2019年第1期90-97,共8页Spacecraft Engineering
摘 要:双向单程体制星间通信测距接收机中,基带负责通信测量的现场可编程门阵列(FPGA)工作时钟通常与外部时频单元送给接收机的10.23MHz时钟是异步关系,这样会导致FPGA内部产生的测距时刻与10.23MHz产生的测距时刻(即秒脉冲上升沿时刻)不完全同步,为了以时频单元输入的测距时刻为基准,需要对FPGA内部产生的测距时刻与时频单元产生的测距时刻进行同步处理。文章提出一种采用伪码锁相跟踪测量的测距修正方法,用FPGA的工作时钟去采样跟踪时频单元10.23MHz时钟,最终输出测距时刻脉冲和相位差,其中测距时刻脉冲用于采样测距信号,而相位差则转换为时间差用于对测距结果进行修正。经理论分析、仿真及FPGA验证,结果表明:此方法可以实现两个异步时钟测距时刻的高精度同步,测量精度高可达皮秒量级,且实现简单,占用FPGA资源较少。The base-band clock of FPGA used in a intersatellite communication ranging receiver based dual one way system is usually asynchronous to the 10.23MHz clock that is given by the external time-frequency unit.In order to take the time frequency clock unit’s ranging time(the positive edge of second plus)generated by the 10.23MHz as the benchmark,it is necessary to synchronize the ranging time generated in the FPGA with that generated by the time-frequency unit.In this paper,a method of pseudo-code tracking measurement is introduced to resolve the problem.The method outputs ranging plus and the phase between the two ranging pluses which can convert to the time.The ranging plus is used to sample the ranging signal and the phase between the two pluses which is used to correct the ranging.Theoretical analysis,simulation and FPGA test show that the method has the feature of high accuracy which can reach to the picose-conds.The method occupies a little resource in FPGA and can be realized easily.
分 类 号:TN851[电子电信—信息与通信工程]
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