Performance Evaluation and Improvement of Chipset Assembly & Test Production Line Based on Variability  被引量:1

Performance Evaluation and Improvement of Chipset Assembly & Test Production Line Based on Variability

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作  者:Chang-Jun Li Zong-Shi Xie Xin-Ran Peng Bo Li 

机构地区:[1]School of Aeronautics and Astronautics,University of Electronic Science and Technology of China

出  处:《International Journal of Automation and computing》2019年第2期186-198,共13页国际自动化与计算杂志(英文版)

基  金:supported by National Natural Science Foundation of China (No. 71671026);Sichuan Science and Technology Program (Nos. 2018GZ0306 and 2017GZ0034)

摘  要:"Factory physics principles" provided a method to evaluate the performance of a simple production line, whose fundamental parameters are known or given. However, it is difficult to obtain the exact and reasonable parameters in actual manufacturing environment, especially for the complex chipset assembly & test production line(CATPL). Besides, research in this field tends to focus on evaluation and improvement of CATPL without considering performance interval and status with variability level. A developed internal benchmark method is proposed, which established three-parameter method based on the Little′s law. It integrates the variability factors, such as processing time, random failure time, and random repair time, to meet performance evaluation and improvement. A case study in a chipset assembly and test factory for the performance of CATPL is implemented. The results demonstrate the potential of the proposed method to meet performance evaluation and emphasise its relevance for practical applications."Factory physics principles" provided a method to evaluate the performance of a simple production line, whose fundamental parameters are known or given. However, it is difficult to obtain the exact and reasonable parameters in actual manufacturing environment, especially for the complex chipset assembly & test production line(CATPL). Besides, research in this field tends to focus on evaluation and improvement of CATPL without considering performance interval and status with variability level. A developed internal benchmark method is proposed, which established three-parameter method based on the Little′s law. It integrates the variability factors, such as processing time, random failure time, and random repair time, to meet performance evaluation and improvement. A case study in a chipset assembly and test factory for the performance of CATPL is implemented. The results demonstrate the potential of the proposed method to meet performance evaluation and emphasise its relevance for practical applications.

关 键 词:Performance evaluation and IMPROVEMENT CHIPSET ASSEMBLY & TEST production line (CATPL) parameters Little's law VARIABILITY 

分 类 号:TP[自动化与计算机技术]

 

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