一种高速高精度AB类全差分运算放大器的设计  

Design of a High Speed and High Accuracy Class-AB Fully Differential Operational Amplifier

作　　者：张镇 王雪原 冯奕 ZHANG Zhen;WANG Xueyuan;FENG Yi(China Electronics Technology Group Corporation No.58 Research Institute, Wuxi 214072, China)

机构地区：[1]中国电子科技集团公司第五十八研究所,江苏无锡214072

出　　处：《电子与封装》2019年第4期19-23,共5页Electronics & Packaging

摘　　要：通过对传统两级单端运放结构的改进,设计了一种AB类输入和输出的全差分运放,在不损失增益的前提下提高了带宽和压摆率。本运放基于JAZZ 0.18μm CMOS工艺进行设计,为了保证设计的鲁棒性,仿真覆盖了全工艺角,结果表明,在3.3 V 10%的电源电压、5 p F的大负载电容、-40～125℃温度条件下,此运放的直流开环增益大于80 d B,单位增益带宽大于170.74 MHz,转换速率大于150 V/μm,静态电流最大为5.8 m A。此运放的版图面积很小,仅为0.017 mm2,通过寄生参数的提取进行了后仿真,其结果和前仿真结果拟合得很好。This paper presented a high-speed class-AB fully-differential operational amplifier. Modified from traditional two-stage single-ended structure, it becomes a class-AB input and output fully differential operational amplifier. The bandwidth and slew rate were improved without decreasing the gain. The amplifier was designed on JAZZ 0.18 μm CMOS process, To ensure the robustness, the simulation covered all the process corners. The results showed that the dc open-loop gain was over 80 d B, the UGF was over 170.74 MHz, the slew rate was over 150 V/μm, the quiescent current was less than 5.8 m A on the 3.3 V±10% supply voltage, 5 p F load capacitor and the temperature of-40~125 ℃. The layout area is very small which is only 0.017 mm2. After extracting the parasitic parameters, the post-simulation results showed it was well matched with the schematic level simulation.

关 键 词：AB类 全差分 全工艺角 

分 类 号：TN402[电子电信—微电子学与固体电子学]