高速串行总线与传统航空总线的混合应用研究  被引量:6

Research on Complex System Application Included High Speed Serial Bus and Aviation Bus Interface

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作  者:侯轶宸[1] 冯毅 HOU Yi-chen;FENG Yi(Xi'an Aeronautics Computing Technique Research Institute,AVIC,Xi'an 710068,China)

机构地区:[1]航空工业西安航空计算技术研究所

出  处:《航空计算技术》2019年第3期106-108,111,共4页Aeronautical Computing Technique

基  金:航空科学基金项目资助(2016ZC31003)

摘  要:嵌入式计算机中高性能处理器的普遍使用,使得处理器间数据通信向大吞吐量趋势迅猛发展。RapidIO通信接口以其高传输速率、低传输延时的特性被广泛地应用于新一代嵌入式计算机的设计中。新一代航空嵌入式计算在追求高性能处理能力的同时,稳定可靠的低速航空总线,如ARINC429总线、1553B总线,依然大量使用。而数据传输过程中,高速串行总线与传统航空总线之间数据匹配问题是设计过程中必须考虑的问题。提出了一种使用FPGA实现高速串行总线与传统航空总线数据传输匹配的方法,与传统使用处理器实现传输数据匹配法相比,该方法具有低转换延时、高可靠性等特点。With the widespread use of high performance processors in embedded computers,data communication between processors is developing rapidly towards high throughput.RapidIO communication interface is widely used in the design of new generation embedded computer because of its high transmission rate and low transmission delay.While pursuing high performance processing capability,the new generation of aviation embedded computing still uses a large number of stable and reliable low-speed aviation buses,such as ARINC429 bus and 1553B bus.In the process of data transmission,data matching between high-speed serial bus and traditional aviation bus is a problem that must be considered in the design process.This paper presents a method of data transmission matching between high-speed serial bus and traditional aviation bus using FPGA.Compared with traditional data matching method using processor,this method has the characteristics of low conversion delay and high reliability.

关 键 词:高速串行总线 航空总线 数据传输 匹配 

分 类 号:TN914[电子电信—通信与信息系统] TN915[电子电信—信息与通信工程]

 

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