用于微机械加速度计的亚微米工艺ADC设计  

Design of an ADC with the submicron process for micromechanical accelerometers

作　　者：于健海 尹亮[2] YU Jianhai;YIN Liang(School of Electronic and Information Engineering,Wuzhou University,Wuzhou 543002,China;MEMS Center,Harbin Institute of Technology,Harbin 150000,China)

机构地区：[1]梧州学院电子与信息工程学院,梧州543002 [2]哈尔滨工业大学MEMS中心,哈尔滨150000

出　　处：《西安电子科技大学学报》2019年第3期140-147,共8页Journal of Xidian University

基　　金：国家自然科学基金(61562074);广西高校科学技术研究项目(KY2015ZD123);广西创新驱动发展专项(科技重大专项)(桂科AA181180361)

摘　　要：为了满足高性能微机械加速度计输出数字化的应用需求,基于亚微米工艺提出了一种16位高阶∑Δ模数转换器。采用五阶前馈单比特量化的方法,实现转换器低失真输出。前级积分器采用增益增强折叠共源共栅一级运放结构,提高低频增益,减少前级运放增益非线性对转换器失真的影响。应用积分器输出摆幅优化的方法和开关电容共模反馈电路的方案降低了整体功耗。测试结果表明,当采样频率为8MHz时,小信号输入失真度低于90dB;在低功耗模式下采样频率降低到4MHz,失真度接近90dB。这种高集成大动态范围的五阶前馈∑Δ模数转换器结构实现了16位输出精度,能够满足微机械加速度计的输出信号转换要求。A 16 bits high-order ∑Δ analog-to-digital converter is proposed based on the submicron process to meet the application requirements for the digital output of high-performance micromechanical accelerometers. The fifth-order feedforward single bit quantization topology is adopted to achieve the low-distortion analog-to-digital converter output. The front-stage integrator adopts the gain-enhanced folded-cascode operational amplifier structure to improve the low-frequency gain and reduce the influence of gain nonlinearity on analog-to-digital converter distortion. The optimization of the integrator output swing and the application of the switched-capacitor common mode feedback circuit reduce the overall power consumption. Test results show that the distortion is lower than 90dB when the sampling frequency is 8MHz and a little higher than 90dB when the sampling frequency is reduced to 4MHz for the low power dissipation mode. This high integration and large dynamic range fifth-order feedforward sigma-delta analog-to-digital converter topology achieves 16 bits resolution, and it can be applied for digitizing the output signal of micromechanical accelerometers.

关 键 词：微机械加速度计 ∑Δ模数转换器 低失真 增益增强折叠共源共栅 

分 类 号：TN4[电子电信—微电子学与固体电子学]