基于FPGA的单周期MIPS处理器设计与实现  

Design and Realization of Single Mips CPUs Based on FPGA

作　　者：王雨桐 刘威 李林瑛[1] WANG Yu-tong;LIU Wei;LI Lin-ying(School of Software, Dalian University of Foreign Languages, Dalian 116044, China)

机构地区：[1]大连外国语大学软件学院

出　　处：《电脑知识与技术》2019年第6Z期278-281,共4页Computer Knowledge and Technology

基　　金：大连外国语大学2018年大学生创新创业训练计划项目(201810172229)

摘　　要：FPGA技术的迅速发展,其使的应用领域从最初的通讯扩展到诸多航空,医疗等诸多领域。Logisim作为一个数字逻辑电路的设计与仿真软件,具有开源免费、可二次开发、免安装、使用简单、结果直观等优点。国外已有院校利用Logisim软件完成了CPU的设计,但国内缺乏此方面的实践经验。本文将阐述如何利用Logisim设计数据通路并与Verilog结合对单周期CPU进行FPGA设计。With its rapid development, the use of the FPGA technology has been extended from the communication industry to many other fields such as aviation and medical treatment. As a design and simulation software, Logisim has the advantages in secondary development, needless to installation, open source, most importantly, easy to use for a beginner. Compared to that of the foreign developed countries, the experience of designing a single CPU on Logisim in China is limited. This project will demonstrate how to use Logisim to design the data path of a single MIPS CPU and realize it via Verilog on Vivado.

关 键 词：FPGA MIPSCPU 单周期CPU VERILOG 计算机组成原理 

分 类 号：TP332[自动化与计算机技术—计算机系统结构]