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作 者:许川佩[1] 王纪锋 牛军浩[1] Xu Chuanpei;Wang Jifeng;Niu Junhao(Guangxi Key Laboratory of Automatic Detection Technology and Instruments,School of Electronic Engineering and Automation,Guilin University of Electronic Technology,Guilin 541004,China)
机构地区:[1]桂林电子科技大学电子工程与自动化学院广西自动检测技术与仪器重点实验室
出 处:《电子技术应用》2019年第8期118-123,共6页Application of Electronic Technique
基 金:国家自然科学基金(61561012)
摘 要:资源网络接口是片上网络处理单元向路由节点发送数据的一个通信接口,负责把处理单元发送的数据打包成路由节点所识别的数据。针对该接口高速传输要求,采用请求、应答通信机制方式设计一个资源网络接口。该接口内各模块间通信,以及该接口与处理单元和路由节点间通信均采用异步通信。接口内的打包器采用奇偶格式设计,缓存模块采用时分复用的思想以降低读、写过程延迟。用VerilogHDL语言完成该接口设计,在ModelSim10.01d平台上验证,最终验证结果表明:设计的资源网络接口能够把处理单元发送来的数据打包成路由节点所识别的数据,且满足高速率数据传输要求。The resource network interface is a communication interface that the on-chip network processing unit sends data to the router, and is responsible for packing the data sent by the processing unit into data identified by the routing node. For the high-speed transmission requirements of this interface, this paper uses a combinational logic circuit to design a resource network interface. The communication between the modules in the interface, and the communication between the interface and the processing unit and the routing node are asynchronous communication;the packager in the interface adopts a parity format design, and the cache module adopts the idea of time division multiplexing to reduce the delay of the read and write processes. The interface design is completed in Verilog HDL language and verified on the ModelSim 10.01d platform. The final verification results show that the designed resource network interface can package the data sent by the processing unit into the data identified by the routing node and meet the high-speed data transmission requirements.
关 键 词:打包器 时分复用 异步资源网络接口 VERILOG HDL
分 类 号:TN402[电子电信—微电子学与固体电子学]
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