基于FPGA的VME总线监视模块的研制  

Development of VME Bus Monitoring Module Based on FPGA

作　　者：汤永东 白煊 TANG Yong-dong;BAI Xuan(The 5720 Factory of the Chinese People's Liberation Army,Wuhu 241007,China;College of Automation Engineering,Nanjing University of Aeronautics&Astronautics,Nanjing 210016,China)

机构地区：[1]中国人民解放军第五七二〇工厂,安徽芜湖241007 [2]南京航空航天大学自动化学院,江苏南京210016

出　　处：《测控技术》2019年第8期108-112,127,共6页Measurement & Control Technology

摘　　要：为满足后续新机VME总线模块电路板深修的需要,在深入分析VME总线通信规范的基础上,运用Allera公司的软核NiosⅡ嵌入式处理器,设计并研制一块VME总线监视模块,给出其硬件架构与各部分电路设计,基于Verilog HDL对其监视功能进行软件开发与时序仿真,并给出其硬件设计与软件开发过程中需要注意的方面,最后对其进行了测试,测试结果表明其有效性。所研制的VME总线监视模块能够为后续新机型中VME总线模块的测试与修理提供技术支撑。In order to meet the needs of the follow-up of the new VME bus module circuit board,based on the in-depth analysis of the VME bus communication specification,the VMEbus monitoring module was designed and developed by using Altera embedded processor Nios II.The hardware architecture of the module and the design of each part of the circuit are given.Based on Verilog HDL,the software development and timing simulation of its monitoring function were described.The aspects of hardware design and software development that need attention are given.The module was tested and the results showed its effectiveness.The development of the VME bus monitoring module can provide technical support for the testing and repair of the VME bus module of the new aircraft.

关 键 词：VME总线 FPGA SOPC VERILOG HDL 

分 类 号：V243[航空宇航科学与技术—飞行器设计] TP336[自动化与计算机技术—计算机系统结构]