浮点整数混合运算单元验证平台的实现  

Implementation of Verification Platform for Floating-Point Integer Mixed Arithmetic Unit

作　　者：戴程 李涛 何星宏 DAI Cheng;LI Tao;HE Xinghong(School of Electronic Engineering,Xi'an University of Posts&Telecommunications,Xi'an 710121)

机构地区：[1]西安邮电大学电子工程学院

出　　处：《计算机与数字工程》2019年第8期1904-1908,共5页Computer & Digital Engineering

基　　金：国家自然科学基金重点项目（编号：61136002）;陕西教育厅科研项目（编号：2050205）资助

摘　　要：论文设计了基于SystemVerilog语言的验证平台来完成浮点整数混合运算单元的功能验证。整个平台包含2个要点:一个是使用IBM实验室开发的浮点测试包进行平台校准测试;另一个是针对每种数据类型的若干测试情况都构建一条独立完整的验证通道,从而使得平台的可重用性及可移植行得到了极大地提升。最后在Covergroup(覆盖组)较为完备的情况下功能覆盖率达到100%,实现了对设计功能的可靠验证。此外拓展定向测试用于问题的自动化重现,从而达到问题的快速定位与分析。In this paper,a verification platform based on SystemVerilog language is designed to complete the functional verification of combined floating-point and integer arithmetic unit.The platform contains two main points.One is that the Floating-Point Test-Suite developed by IBM laboratory is used for platform calibration.The other is to build an independent and complete verification channel for several test cases of each data type,which makes the platform's reusability and portability greatly improved.Finally,?the coverage rate is 100%when the Covergroup is comparatively complete,which achieves the reliable verification of the design function.In addition,the directional test is used to automatically reproduce the problem,so as to achieve the rapid positioning and analysis of the problem.

关 键 词：运算单元 SYSTEMVERILOG 验证平台 IBM浮点测试包 可重用 可移植 

分 类 号：C32[社会学]