基于FPGA多电平D类功率放大器的PWM触发器  

PWM Flip-flop Based on Multi-level Class D Power Amplifier of FPGA

作　　者：牛茜[1] NIU Qian(Shanxi Institute of mechanical and electrical technology,Shanxi 046000,China)

机构地区：[1]山西机电职业技术学院

出　　处：《集成电路应用》2019年第12期10-11,共2页Application of IC

基　　金：山西省教育系统科技创新课题项目

摘　　要：阐述基于FPGA多电平D类功率放大器的PWM触发器,以载波相移PWM技术为主要依据,从FPGA实现的电路内部结构、实验结果以及结果分析几个方面进行研究分析。其目的在于保障D类功率放大器触发电路当中的电路结构更加清晰简单,充分保障D类功率放大器的输出品质,推动多电平D类功率放大器的应用与推广。This paper describes the PWM flip-flop based on the multi-level class D power amplifier of the FPGA. Based on the carrier phase-shifted PWM technology, the internal structure of the circuit realized by the FPGA, the experimental results and the analysis of the results are studied and analyzed. Its purpose is to ensure that the trigger circuit of class D power amplifier has a clearer and simpler circuit structure, to fully guarantee the output quality of class D power amplifier, and to promote the application and promotion of multi-level class D power amplifier.

关 键 词：集成电路设计 FPGA 多电平 D类功率放大器 PWM触发器 

分 类 号：TN402[电子电信—微电子学与固体电子学] TN722.75