高压栅驱动电路中高速工况研究与设计  

Research and design about high speed working condition in high voltage gate driver

作　　者：雷一博 方健 陈智昕 王定良 LEI Yibo;FANG Jian;CHEN Zhixing;WANG Dingliang(School of Electronic Science and Engineering,University of Electronic Science and Technology of China,Chengdu Sichuan 610054,China)

机构地区：[1]电子科技大学电子科学与工程学院

出　　处：《太赫兹科学与电子信息学报》2019年第6期1098-1101,1106,共5页Journal of Terahertz Science and Electronic Information Technology

摘　　要：基于高压栅驱动电路,提出一种高速工况下的改进结构,以克服不确定的错误输出。新结构包括高速工况保护技术和一种能够消除R/S触发器输入不确定状态的技术。与传统的栅驱动电路相比,新结构拥有更好的抗风险能力。基于华润上华1μm600 V引导配置数据(BCD)工艺平台,使用Cadance公司的Hspice软件仿真验证,并给出改进方案。仿真结果证明,该技术能将高压电平位移电路中窄脉冲信号脉宽从100 ns削波至10 ns。A novel protective technology based on high voltage gate driver has been developed to overcome false output in the high speed operation.The novel technology includes an high frequency protection structure.Compared with conventional gate driver circuit,the new technology achieves better resistivity encountering risks.Based on Central Semiconductor Manufacturing Corporation(CSMC)1μm 600 V Boot Configuration Data(BCD)technology platform,this paper uses the Hspice simulation software of Cadence to verify the problem,and gives the improved project.The simulation results show that the novel improvement can reduce the pulse width from 100 ns to 10 ns in the high voltage level shift circuit.

关 键 词：高压栅驱动 BCD工艺 电平位移 窄脉冲 RS触发器 

分 类 号：TN47[电子电信—微电子学与固体电子学]