基于ModelSim的VHDL仿真技术研究与应用  

Research and Application of VHDL Modulation Technology Based on ModelSim

作　　者：陈志刚 CHEN Zhi-gang(Changzhou Institute of Industry Technology,Changzhou 213164,China)

机构地区：[1]常州工业职业技术学院

出　　处：《电脑知识与技术》2019年第11期286-287,共2页Computer Knowledge and Technology

基　　金：江苏省高职院校教师专业带头人高端研修，2018TDFX002，江苏省教育厅

摘　　要：电子产品设计人员希望电子器件有更小的功耗、更强的功能、更低的价格,这就要求将更多的功能集成到单一的芯片。随着计算机技术的快速发展,电子系统设计过程中广泛使用VHDL语言,首先利用VHDL完成电子产品的系统设计,再通过EDA软件对VHDL程序进行编译,产生SDF文件,ModelSim通过调用SDF文件,使用Testbench生成相应的测试激励。以24进制计数为例,应用联合仿真,有效解决不同种类激励源的产生、验证自动化、平台移植等问题。Electronic engineers hope that electronic devices will consume less power,perform stronger functions and have lower prices,which demands more functions to be integrated into a single chip.With the rapid development of computer technology,VHDL language is widely adopted within the design of electronic systems.First,the system design of electronic products is completed via VHDL.Then,the VHDL program is compiled by EDA software to generate SDF files.ModelSim generates corresponding test incentives by calling SDF files and using Testbench.Taking the 24 counter as an example to illustrate the application of joint simulation to some problems,such as the generation of various excitation sources,verification automation,platform transplantation and so on.

关 键 词：MODELSIM QUARTUSII Testbench 联合仿真 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]