一种32位MCU的FPGA验证平台  

FPGA Verification Platform for 32-bit MCU

作　　者：刘云晶 刘梦影 LIU Yunjing;LIU Mengying(China Key System&Integrated Circuit Co.,Ltd.,Wuxi 214072,China)

机构地区：[1]中科芯集成电路有限公司

出　　处：《电子与封装》2020年第1期41-47,共7页Electronics & Packaging

摘　　要：随着应用的复杂化和多样化,微控制器(MCU)设计规模急剧增大,性能要求越来越高。为缩短芯片验证时间,提高验证效率,采用FPGA原型验证平台是一个有效的方法。通过建立基于FPGA的高性能原型验证系统,可及时发现芯片设计中的错误和不足,进而缩短MCU芯片研发周期。以一款通用MCU为研究对象,通过修改时钟系统,替换存储器和综合布局布线设计FPGA验证平台,并利用该平台进行软硬件协同验证,为该芯片的验证工作提供了高效有力的支撑。With various application and increasing micro-controller unit(MCU)design scale,the requirements of MCU performance is getting higher and more complex.It is an effective method to adopt FPGA prototype verification for faster verification rate.By building a high-performance FPGA prototype verification system,design mistakes and disadvantages may be found in time.As consequence,the developing time can be saved as well.Taking a general MCU as research subject,an FPGA verification platform is set up by modifying clock system and replacing memory.Furthermore,processing hardware and software co-verification through this platform provides strong support for system level verification of this MCU design.

关 键 词：微控制器 FPGA 原型验证 软硬件协同验证 

分 类 号：TN912.32[电子电信—通信与信息系统]