锗硅外延工艺优化对28nm PMOS器件性能的改善  

Improvement of 28nm PMOS device performance by SiGe EPI technology optimization

作　　者：李帅 蔡小五[2] 隋振超 LI Shuai;CAI Xiao-wu;SUI Zhen-chao(College of Microelectronics,University of Chinese Academy of Sciences,Beijing 100029,China;Institute of Microelectronics,Chinese Academy of Science,Beijing 100029,China;Semiconductor Manufacturing International Corporation(SMIC),Beijing 100176,China)

机构地区：[1]中国科学院大学微电子学院,北京100029 [2]中国科学院微电子研究所,北京100029 [3]中芯国际集成电路制造有限公司,北京100176

出　　处：《微电子学与计算机》2020年第5期28-32,共5页Microelectronics & Computer

基　　金：国家自然科学基金(61874135)。

摘　　要：在28 nm CMOS技术节点,锗硅技术在器件沟道产生压应力可以提高PMOS电学性能.在选择性锗硅外延工艺基础上对锗含量进行细化阶梯分布,此阶梯式分布能避免因锗含量过高产生位错而进一步提高总体应力效果.通过研究发现,薄膜堆叠层的厚度和锗元素浓度是影响器件性能的重要因素,实验对堆叠层厚度和锗浓度同时改变比单独改变一种影响因素获得的器件性能更好,器件的饱和电流和漏电流的性能(Idsat-Ioff)可以提高7%,同时,器件阈值电压和饱和电流的性能(Vtsat-Idsat)、器件阈值电压和漏电流(Vtsat-Ioff)性能、漏致势垒降低(DIBL)效应也有相应的改善.In the 28 nm CMOS technologynode,Silicon germanium technology produces compressive stress in the device channel to improve PMOS electrical performance.Germanium are doped in stepped way based on selective silicon germanium epitaxial process,it can avoid the occurrence of dislocations due to higher dose of germanium and further improve the overall stress effect.Besides research, The thickness of the thin film stack and the concentration of germanium are important factors affecting device performance.Simultaneously changing the thickness of the stacked layer and the germanium concentration is better than the performance ofdevice obtained by separately changing one of the influencing factors.On state current and off state current performance(Idsat-Ioff) can improve 7%,simultaneously,Vtsat-Idsat performance, Vt-Ioff performance and DIBL also have obvious improvement.

关 键 词：锗硅外延 薄膜堆叠层 器件性能 PMOS器件 

分 类 号：TN482[电子电信—微电子学与固体电子学]