基于V93k ATE的SoC芯片输出不稳定的测试方法  

Realization of Output Instability Testing Method of SoC Chip Based on V93k ATE

作　　者：刘相伟 唐昱 唐丽 刘安康 LIU Xiangwei;TANG Yu;TANG Li;LIU Ankang(Chengdu Javee Microelectronics Co.,Ltd,Sichuang 610041,China)

机构地区：[1]成都三零嘉微电子有限公司,四川610041

出　　处：《集成电路应用》2020年第5期43-45,共3页Application of IC

基　　金：四川省科技企业技术创新课题项目。

摘　　要：分析表明,大多数SoC芯片是基于锁相环倍频外部时钟或内部时钟来运行的,而芯片之间的加工工艺存在细微差异,导致各个芯片工作可能的存在时序差异。即使同一颗芯片在不同的电压和温度的条件下,其工作时序也存在一定差异。针对芯片波形时序不稳定的情况,介绍一种基于V93k ATE的波形转换跟踪的测试方法。The analysis shows that most SoC chip is based on frequency multiplication phaselocked loop external clock or internal clock to work.However,there are slight differences in processing technology between the chips,which may lead to timing differences in the work of each chip.Even if the same chip at different voltage and temperature conditions,the work timing sequence is also different.In view of the instability of chip waveform timing,this paper introduces a testing method of waveform conversion tracking based on V93k ATE.

关 键 词：集成电路测试 系统级芯片 波形转换跟踪 时序差异 

分 类 号：TN407[电子电信—微电子学与固体电子学]