DOE方法在ESD及LU测试故障定位方面的应用研究  

Study on the Application of DOE Method in ESD and LU Testing Failure Localization

作　　者：鹿祥宾 陈燕宁 张海峰 原义栋 钟明琛 张志刚 LU Xiangbin;CHEN Yanning;ZHANG Haifeng;YUAN Yidong;ZHONG Mingchen;ZHANG Zhigang(Stale Grid Key Laboratory of Power Industrial Chip Design and Analysis Technology,Beijing Smart Chip Micro-electronics Technology Co.,Ltd.Beijing,100192,CHN;Bejing Engineering Research Center of High-reliabilily IC with Power Indusrial Grade,Beijing Smart Chip Mi-croelectronics Teechnology Co,Ltd,Beijing,100192,CHN)

机构地区：[1]北京智芯微电子科技有限公司,国家电网公司重点实验室电力芯片设计分析实验室,北京100192 [2]北京智芯微电子科技有限公司,北京市电力高可靠性集成电路设计工程技术研究中心,北京100192

出　　处：《固体电子学研究与进展》2020年第3期226-232,共7页Research & Progress of SSE

基　　金：国家自然科学基金资助项目(U1866212)。

摘　　要：介绍了一种通过因果图及DOE(试验设计)对ESD及LU测试中出现的复杂失效问题进行快速分析定位的方法。该方法通过因果图的制定,全面建立可能造成失效的各个层级的影响因子;通过两个层次DOE设计,以最少的测试次数筛选出最关键的影响因子。最终发现I-V曲线测量时电压设定过大以及I-V曲线测量达到一定次数是触发本次失效问题产生的根本原因。该分析方法可以作为ESD及LU测试中失效分析的有力补充。A quick localization method by cause-effect diagram and DOE(Design of Experiments)on complex failure problems in ESD and LU test was presented.Through the establishment of causeeffect diagram,this method comprehensively establishes the influence factors of all levels that may cause failure.Through the two-level DOE design,the most critical influencing factors are screened out with the minimum test times.Finally,it is found that excessive voltage setting and certain times of I-V curve measurement are the root causes of this failure.This method can be used as a powerful supplement to ESD and LU test failure analysis.

关 键 词：静电放电 闩锁效应 I-V曲线测试 因果图 试验设计 失效分析 

分 类 号：TN31[电子电信—物理电子学] TP31[自动化与计算机技术—计算机软件与理论]