超大规模集成电路倒装焊设计技术研究  

The Research of Flip Chip Technology on Very-large-scale Integrated Circuit

作　　者：张磊[1] 王健[2] ZHANG Lei;WANG Jian(The 54th Research Institute of CETC)

机构地区：[1]中国电子科技集团公司第五十四研究所微系统中心 [2]中国电子科技集团公司第五十四研究所

出　　处：《中国集成电路》2020年第7期85-89,共5页China lntegrated Circuit

摘　　要：封装是集成电路设计流程中非常重要的一环,是管芯的环境载体,提供了信息交互、电源供给、散热与结构强度。随着集成电路工艺发展,管脚数目越来越多、频率逐年翻番,只有采用管脚集成度更高、速率更快的倒装焊封装技术,才能满足设计要求。本文从版图布局开始,对重布线层设计、柱下金属层的加工、基板设计,以及与流片厂商、封装厂商数据交互,进行了归纳总结,为对倒装焊封装设计有需求的项目提供了参考意见,具有一定借鉴意义。Packaging is a very important part of the integrated circuit design process and is the environmental carrier of the core,providing information exchange,power supply,heat dissipation and structural strength.With the development of integrated circuit technology,the number of pins is increasing and the frequency is doubling year by year.Only the flip chip packaging technology with higher pin integration and faster speed can meet the design requirements.Starting from layout,this paper summarizes the design of redistribute layer,the processing of metal layer under column,the design of substrate,and the data interaction with chip manufacturers and package manufacturers,it provides a reference for the project which has the demand for flip chip packaging design,and has certain reference significance.

关 键 词：再分配布线层 柱下金属层 掩膜板数据 高密度封装 

分 类 号：TN405[电子电信—微电子学与固体电子学]