一种片上系统片外互连可靠性仿真技术研究  

Research on a Reliability Simulation Technology of System-on-Chip Off-Chip Interconnect

作　　者：李欣荣 雷庭 于迪[2] 杨云[2] 王浩[2] 刘瑜珂 LI Xinrong;LEI Ting;YU Di;YANG Yun;WANG Hao;LIU Yuke(CEPREI,Guangzhou 510610,China)

机构地区：[1]工业和信息化部电子第五研究所数据中心 [2]工业和信息化部电子第五研究所,广东广州510610

出　　处：《电子产品可靠性与环境试验》2020年第S02期23-26,共4页Electronic Product Reliability and Environmental Testing

摘　　要：结合国内SoC虚拟化验证体系的现状,梳理总结出了SoC片外互连可靠性仿真流程。并选取某型SoC开展片外互连可靠性仿真分析。通过开展热学仿真、振动仿真和寿命仿真等工作,最终得出了该型SoC的可靠性仿真结果,结果分析表明,该仿真方法满足实际的应用需求。Combined with the current status of the domestic system-on-chip virtualization verification system, the reliability simulation flow of SoC off-chip interconnection is summarized.And a SoC is selected to carry out simulation analysis of off-chip interconnect reliability.Through carrying out thermal simulation, vibration simulation, life simulation and other work, the reliability simulation results of the SoC are finally obtained. The analysis of the results shows that this simulation method meets the needs of practical applications.

关 键 词：片上系统 互连可靠性 仿真 

分 类 号：TP391.99[自动化与计算机技术—计算机应用技术]