基于InP双异质结双极型晶体管工艺的超宽带低相噪可编程分频器  

A Programmable Frequency Divider with UWB and Low Phase Noise Based on InP DHBT Technology

作　　者：张敏[1,2,3,4] 孟桥 张有涛[2,3] 张翼[4] 李晓鹏 ZHANG Min;MENG Qiao;ZHANG You-tao;ZHANG Yi;LI Xiao-peng(Institute of RF&OE ICs,Southeast University,Nanjing 210096,China;Nanjing GuoBo Electronics Co.,Ltd,Nanjing 211153,China;The 55th Institute of China Electronics Technology Group Corporation,Nanjing 210016,China;National and Local Joint Engineering Laboratory of RF Integration and Micro-assembly Technology,Nanjing 211153,China)

机构地区：[1]东南大学射频光电集成电路研究所,南京210096 [2]南京国博电子有限公司,南京211153 [3]中国电子科技集团公司第五十五研究所,南京210016 [4]射频集成与微组装技术国家地方联合工程实验室,南京211153

出　　处：《微波学报》2020年第4期21-24,32,共5页Journal of Microwaves

基　　金：国家自然科学基金(61804081)。

摘　　要：实现了一款高性能超宽带低相噪可编程分频器芯片,内部分频模块采用电流模式逻辑结构的数字分频原理实现。芯片采用三路外部信号对内部分频模块及开关组进行选通、控制,实现1、2、4、8四种分频比的切换。对内部单元进行了设计优化以提高芯片宽频带内的整体性能。该芯片采用0.7μm InP DHBT工艺实现,测试结果显示在1~40 GHz超宽带范围内,其输入功率可覆盖-10^+8 dBm,高载波下相位噪声可低至-145 dBc/Hz,最大功耗0.63 W。该芯片拥有完整的电路架构,宽带工作性能优良且有较低的相位噪声,可直接应用于超宽带频率源系统。In this paper,a high performance ultra-wideband and low phase noise programmable frequency divider is implemented.The internal frequency division modules are realized by digital principle using current mode logic structure.There are three external signals to select and control the internal frequency division modules and switches,realizing division ratios among 1,2,4 and 8.The internal units are optimized to improve the performance of the chip.The chip is implemented in a 0.7μm InP DHBT process.The measurement results show that the input power of the chip can cover-10^+8 dBm in the range of 1~40 GHz ultra-wideband.The phase noise at high frequency carrier can be as low as-145 dBc/Hz,and the maximum power consumption is 0.63 W.The chip has a complete circuit structure,excellent broadband performance and low phase noise,which can be directly used in the ultra-wideband frequency source system.

关 键 词：分频器 磷化铟 可编程 超宽带 低相噪 

分 类 号：TN772[电子电信—电路与系统]