基于40 nm工艺的单比特超宽带ADC  

A Single Bit Ultra-wide Band ADC Based on 40 nm Process

作　　者：易政 郭轩 郑旭强 季尔优 吴旦昱[1] YI Zheng;GUO Xuan;ZHENG Xuqiang;JI Eryou;WU Danyu(Institute of Microelectronics,Chinese Academy of Sciences,Beijing,100029,CHN;University of Chinese Academy of Sciences,Bejing,100049,CHN)

机构地区：[1]中国科学院微电子研究所,北京100029 [2]中国科学院大学,北京100049

出　　处：《固体电子学研究与进展》2020年第4期275-279,共5页Research & Progress of SSE

基　　金：国家重点研发计划资助项目(2018YFB2202302)。

摘　　要：采用TSMC 40 nm工艺实现了一款宽带高速ADC。芯片采用时间交织的结构,单通道采用Flash结构,采样率为5 GS/s,8个子通道交织达到40 GS/s的采样率。测试结果表明,芯片的采样率可以达到38.4 GS/s,且在该采样率下,输入信号带宽可达18 GHz,灵敏度小于-20 dBm,可以满足单比特超宽带收发系统的需求。TSMC 40 nm process was used to implement a broadband high-speed ADC,which adopted time interleaving structure.The sampling rate of single channel adopted a flash structure was 5 GS/s. Eight sub-channels were interleaved to achieve a sampling rate of 40 GS/s. The test results show that the sampling rate of the chip can reach 38.4 GS/s. Under this sampling rate,the input signal bandwidth can reach 18 GHz and the sensitivity is less than -20 dBm,which can meet the requirements of single bit ultra-wide band transceiver systems.

关 键 词：模数转换器 时间交织 高采样率 大信号带宽 

分 类 号：TN432[电子电信—微电子学与固体电子学]