一种10 Gb/s超低抖动时钟数据恢复电路的设计  

Design of a 10 Gb/s ultra-low jitter clock data recovery circuit

作　　者：刘泽法 宋树祥[1] 岑明灿 翟江辉[2] 蔡超波 LIU Zefa;SONG Shuxiang;CEN Mingcan;ZHAI Jianghui;CAI Chaobo(College of Electronic Engineering,Guangxi Normal University,Guilin 541004,Guangxi Zhuang Autonomous Region,China;College of Information and Communication,Guilin University of Electronic Technology,Guilin 541004,Guangxi Zhuang Autonomous Region,China)

机构地区：[1]广西师范大学电子工程学院,广西桂林541004 [2]桂林电子科技大学信息与通信学院,广西桂林541004

出　　处：《电子元件与材料》2020年第12期89-95,100,共8页Electronic Components And Materials

基　　金：国家自然科学基金(6196030049)。

摘　　要：在高速信号传输过程中,传输速率的加快会导致数据的误码率以及时钟抖动不断加大,甚至会造成接收端数据出错。为了减少时钟抖动对接收端数据恢复造成的不利影响,提出一种10 Gb/s超低抖动时钟数据恢复电路。引入了数据同步器来减小正交参考时钟与输入数据间的相位差。与此同时,采用频率裁决单元来缩小两者的频率差,使输入数据与参考时钟在频率和相位上拥有较高匹配度。电路采用了台积电(TSMC)40 nm CMOS工艺,通过加入伪随机数据编码(PRBS31)进行仿真测试,接收端误码率小于10^-12,总功耗为134 mW,恢复出的数据对应的时钟抖动峰值为6.94 ps。相比于传统的时钟数据恢复电路,该电路还考虑了外部输入数据的消抖,可以运用于数据接收端来恢复数据传输速率较高(8.3~10.0 Gb/s)的数据时钟。For signal transmission,higher transmission rate can cause increased data error rate and clock jitter,which could results in data errors at receiving end.To reduce the adverse clock jitter for data recovery at the receiving end,a 10 Gb/s ultra-low jitter clock data recovery circuit was designed.A data synchronizer and a frequency decision unit were used to reduce the phase and frequency difference between the quadrature reference clock and the input data respectively,which results in well matching in frequency and phase between them.TSMC 40 nm CMOS process was used for this circuit.By adding pseudo-random data encoding(PRBS31)for simulation test,the bit error rate(BER)at the receiving end is less than 10^-12 with total power consumption of 134 mW,and the peak jitter of the recovered data is 6.94 ps.Compared with traditional clock data recovery circuit,the jitter elimination of external input data was also considered in this circuit,which can be applied to the data receiving end to recover the data clock at higher data transmission rate(from 8.3 Gb/s to 10.0 Gb/s).

关 键 词：时钟数据恢复电路 半速率鉴相器 锁相环 抖动 

分 类 号：TN402[电子电信—微电子学与固体电子学]