基于SystemVerilog的数字基带通信芯片的验证  

Verification of Digital Baseband Communication on Chip Based on System Verilog

作　　者：乔鹏丽 吕英杰[1] Qiao Pengli;Lu Yingjie(College o f Electronic Information and Optical Engineering,Nankai University,Tianjin 300350,China)

机构地区：[1]南开大学电子信息与光学工程学院,天津300350

出　　处：《南开大学学报（自然科学版）》2020年第6期1-4,共4页Acta Scientiarum Naturalium Universitatis Nankaiensis

摘　　要：随着集成电路设计复杂度的提高,验证的难度也随之提高,传统的基于Verilog搭建的验证平台已经不能满足要求.以数字基带通信芯片为验证对象,基于SystemVerilog语言建立一种双向通信的验证平台.该验证平台采用类的思想进行设计,使其更易于修改和可重用.与传统的验证平台相比,分层次的验证平台具有更高的灵活性和易操作性.With the development of integrated circuit’s design complexity, verification has become more and more difficult, and the traditional verification testbench based on Verilog can not meet the requirements. A bidirectional communication verification testbench for digital baseband communication on chip based on SystemVerilog is introduced. The testbench is designed with the thought of class, which makes it is more easier to be modified and reuseable. Compared to the traditional platform, hierarchical testbench is more flexible and easy to operate.

关 键 词：验证平台 双向通信 SYSTEMVERILOG 分层次 

分 类 号：TN47[电子电信—微电子学与固体电子学]