基于FPGA的数字加速度计设计与实现  

Design and implementation of digital accelerometer based on FPGA

作　　者：王特 李杰[1] 毕彦峰 胡陈君 WANG Te;LI Jie;BI Yanfeng;HU Chenjun(State Key Laboratory of Electronic Testing Technology,North University of China,Taiyuan 030051,China;Suzhou Zhongsheng Nanotechnology Company,Suzhou 215123,China)

机构地区：[1]中北大学电子测试技术国家重点实验室,山西太原030051 [2]苏州中盛纳米科技有限公司,江苏苏州215123

出　　处：《传感器与微系统》2021年第2期69-72,共4页Transducer and Microsystem Technologies

摘　　要：为了能更加方便快捷地获取弹体坐标系下三个方向的加速度信息,提出一种将三轴加速度计输出电压值转换为加速度值量化输出的方法。对传统的标定系数矩阵将电压值转换为加速度的算法进行了化简优化,利用现场可编程门阵列(FPGA)进行数据运算,有效地提高了数据的转换速度,同时又能灵活地适应模数转换芯片的采样精度和加速度值的量化范围。最后通过输入真实的工程数据进行仿真并利用三轴转台进行试验验证,结果表明:数字速度的实现真实有效。In order to obtain the acceleration information of the three directions in the projectile coordinate system more conveniently and quickly,a method of converting the output voltage value of the three-axis accelerometer into the quantized output of the acceleration value is proposed. The algorithm of traditional calibration coefficient matrix to convert voltage value into acceleration is simplified and optimized. Field programmable gate array( FPGA) is used for data calculation,which effectively improves the speed of data conversion,while flexibly adapting to the sampling precision and quantization range of the acceleration value. Finally,simulation is performed by inputting real engineering data and a three-axis turntable is used for experimental verification. The results show that the realization of the digital accelerometer is real and effective.

关 键 词：三轴加速度计 数字接口 现场可编程门阵列(FPGA) IP核 

分 类 号：TP212[自动化与计算机技术—检测技术与自动化装置] TP274[自动化与计算机技术—控制科学与工程]