面向微处理器核的片上老化检测模块设计  

Design of on-chip aging detection module for microprocessor core

作　　者：刘帅 虞致国 洪广伟 顾晓峰 LIU Shuai;YU Zhiguo;HONG Guangwei;GU Xiaofeng(Engineering Research Center of IoT Technology Applications,Ministry of Education,Department of Electronic Engineering,Jiangnan University,Wuxi 214122,China)

机构地区：[1]江南大学物联网技术应用教育部工程研究中心电子工程系,江苏无锡214122

出　　处：《传感器与微系统》2021年第2期89-91,94,共4页Transducer and Microsystem Technologies

基　　金：中央高校基本科研业务费专项资金资助项目(JUSRP51510);江苏省研究生科研与实践创新计划资助项目(SICX18_0647);江苏省重点研发计划资助项目。

摘　　要：为检测负偏压温度不稳定性(NBTI)效应导致的微处理器中组合逻辑路径延迟的增大,设计了一种可感知微处理器核NBTI效应的混合结构检测模块。检测模块包括老化延时探测模块及测量模块,能够准确测量NBTI效应造成的电路延时增量;相比于传统单一的延迟线结构,其面积开销降低40%。所设计的结构在ISCAS与OR1200核上实验,延时测量精度达到94%以上,可为微处理器的可靠性设计提供细粒度的防护。In order to detect the impact of the negative bias temperature instability( NBTI) effect on combinatorial logic path delay,a hybrid structure detection module for sensing the NBTI effect of the microprocessor core is designed. It includes mainly an aging delay detection module and a measurement module,which can measure the circuit delay caused by the NBTI effect accurately. Experimental results show that the area overhead is reduced by40 % compared to the traditional single delay line structure. The designed structure is tested on the ISCAS and OR1200 cores,and the delay measurement precision can reach more than 94 %,which can provide the fine-grained protection for the reliability design of microprocessors.

关 键 词：微处理器 负偏压温度不稳定性 片上老化测量 细粒度 

分 类 号：TN492[电子电信—微电子学与固体电子学]