Integration of GaN analog building blocks on p-GaN wafers for GaN ICs  

作　　者：Xiangdong Li Karen Geens Nooshin Amirifar Ming Zhao Shuzhen You Niels Posthuma Hu Liang Guido Groeseneken Stefaan Decoutere 

机构地区：[1]imec,Leuven 3001,Belgium [2]Department of Electrical Engineering,KU Leuven,Leuven 3001,Belgium

出　　处：《Journal of Semiconductors》2021年第2期113-116,共4页半导体学报（英文版）

摘　　要：We demonstrate the key module of comparators in GaN ICs,based on resistor-transistor logic(RTL)on E-mode wafers in this work.The fundamental inverters in the comparator consist of a p-GaN gate HEMT and a 2DEG resistor as the load.The function of the RTL comparators is finally verified by a undervoltage lockout(UVLO)circuit.The compatibility of this circuit with the current p-GaN technology paves the way for integrating logic ICs together with the power devices.

关 键 词：P-GAN resistor-transistor logic(RTL) comparator undervoltage lockout(UVLO) GaN ICs 

分 类 号：TN43[电子电信—微电子学与固体电子学]