基于VerilogHDL智能评测平台的“计算机组成原理”课程贯通式实验模式  

Through experiment model of “Computer organization” course based on VerilogHDL intelligent evaluation platform

作　　者：张磊[1] 王建萍[1] 郑榕[1] 何杰[1] 齐悦[1] ZHANG Lei;WANG Jianping;ZHENG Rong;HE Jie;QI Yue(School of Computer and Communication Engineering,University of Science and Technology Beijing,Beijing 100083,China)

机构地区：[1]北京科技大学计算机与通信工程学院,北京100083

出　　处：《实验技术与管理》2021年第3期236-241,共6页Experimental Technology and Management

基　　金：国家自然科学基金项目(61971031);中央高校基本科研业务费专项资助项目(FRF-DF-20-40);北京科技大学重大教改项目(JG2019ZD02);北京科技大学教学研究项目(JG2017M30)。

摘　　要：针对"计算机组成原理"课程,以计算机系统能力培养为中心目标,提出贯通式实验教学模式,设计了基础实践、综合实践、创新实践三个层次的八项实验,构建了以MIPS单周期处理器设计为核心的实验内容,着眼于学生五方面能力的培养。基于自研的VerilogHDL智能评测平台,探索了提升学生实验效率和教师验收效率的方法,设计了更为科学合理的实验考核方式。通过一系列改革与实践,学生在计算机系统能力上得到较好的训练,为后续专业课程的学习打下了良好基础,教师的实验教学水平也迈上一个新台阶。Based on the "Computer organization" course and by taking the cultivation of computer system ability as the central goal, this paper puts forward a through experimental teaching model, and designs eight experiments on the basis of basic practice, comprehensive practice and innovative practice at the three levels and constructs the experimental content with MIPS single cycle processor design as the core, focusing on the cultivation of students’ ability in five aspects. Based on the self-developed VerilogHDL intelligent evaluation platform, the methods to improve students’ experimental efficiency and teachers’ acceptance efficiency are explored, and a more scientific and reasonable experimental assessment method is designed. Through a series of reform and practice, students get better training for computer system ability, which lays a good foundation for the follow-up professional courses, and teachers’ experimental teaching level has also stepped to a new level.

关 键 词：MIPS单周期处理器 计算机组成原理实验 VERILOGHDL 智能评测平台 

分 类 号：TP301-4[自动化与计算机技术—计算机系统结构] G642[自动化与计算机技术—计算机科学与技术]