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作 者:王子健 黄继伟[1] WANG Zijian;HUANG Jiwei(School of Physics and Information Engineering,Fuzhou University,Fuzhou 350108,P.R.China)
机构地区:[1]福州大学物理与信息工程学院,福州350108
出 处:《微电子学》2021年第2期173-178,264,共7页Microelectronics
基 金:国家自然科学基金资助项目(61774035)。
摘 要:基于0.18μm CMOS工艺,设计了一种应用于VHF频段直接射频采样接收机的低噪声放大器。为解决在VHF频段使用电感而造成的面积大、难集成等问题,采用无电感结构设计,使电路具备单端输入、双端输出的功能;为减少噪声,采用共源共栅负反馈噪声抵消结构。后仿真结果表明,在30~300 MHz频带内,整体电路的输入匹配参数S11小于-15 dB,输出匹配参数S22小于-12.6 dB,增益范围为25.22~25.39 dB,噪声系数小于1.927 dB。版图尺寸为204μm×365μm。Based on a 0.18 μm CMOS process, a wideband low noise amplifier(LNA)applied in direct RF sampling(DRFS) receivers at VHF was designed. In order to solve the problems of large area and difficult integration caused by using inductor at VHF, an inductorless structure was adopted, so the circuit had the function of single input and double output. In order to reduce noise, a noise cancellation structure based on cascode negative feedback was adopted. The post-simulation results showed that the whole circuit’s input matching parameter S11 was less than-15 dB, the output matching parameter S22 was less than-12.6 dB, the gain was 25.22~25.39 dB, and the noise factor was less than 1.927 dB within 30~300 MHz. The Layout size was 204 μm×365 μm.
分 类 号:TN722.3[电子电信—电路与系统]
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