一种系统级封装的ESD保护技术  

A Kind of ESD Protection Technology Using System in Package

作　　者：李搏[1] 李健壮[1] 干旭春[1] 黄晓宗[1] LI Bo;LI Jianzhuang;GAN Xuchun;HUANG Xiaozong(The 24th Research Institute of China Electronics Technology Group Corp.,Chongqing 400060,P.R.China)

机构地区：[1]中国电子科技集团公司第二十四研究所,重庆400060

出　　处：《微电子学》2021年第2期211-215,共5页Microelectronics

基　　金：模拟集成电路国家重点实验室基金资助项目(614280204030317)。

摘　　要：介绍了一种系统级封装(SiP)的ESD保护技术。采用瞬态抑制二极管(TVS)构建合理的ESD电流泄放路径,实现了一种SiP的ESD保护电路。将片上核心芯片的抗ESD能力从HBM 2 000 V提升到8 000 V。SiP ESD保护技术相比片上ESD保护技术,抗ESD能力提升效果显著,缩短了开发周期。该技术兼容原芯片封装尺寸,可广泛应用于SiP类产品开发中。A kind of electrostatic discharge(ESD) protection technology using system in package(SiP) was presented. A SiP ESD protection circuit was realized by using TVS diodes to construct a reasonable ESD current discharge path. The anti ESD capability of core chip was improved from HBM 2 000 V to 8 000 V. Compared with the on chip ESD protection technology, the SiP ESD protection technology could significantly improve the ESD ability, shorten the design cycle, and be compatible with the original chip package size, which could be widely used in the product of SiP circuit.

关 键 词：ESD 系统级封装 瞬态抑制二极管 

分 类 号：TN406[电子电信—微电子学与固体电子学]