射频电路ESD防护优化设计  

Optimization Design of an ESD Protection Strategy in RF Circuits

作　　者：彭雄 徐骅 刘韬 陈昆 乔哲 袁波 PENG Xiong;XU Hua;LIU Tao;CHEN Kun;QIAO Zhe;YUAN Bo(Chongqing Acoustic-Optic-Electronic Co.,Ltd.of China Electronics Technol.Group Corp.,Chongqing 401332,P.R.China;Chongqing Southwest Integrated Circuit Design Co.,Ltd.,Chongqing 401332,P.R.China)

机构地区：[1]中国电子科技集团重庆声光电有限公司,重庆401332 [2]重庆西南集成电路设计有限责任公司,重庆401332

出　　处：《微电子学》2021年第3期363-367,共5页Microelectronics

基　　金：重庆市技术创新与应用发展专项项目(CSTC2020JSCX-GKSBX0012)。

摘　　要：在0.18μm SiGe BiCMOS工艺下,设计了三种射频端口的ESD防护电路。在不影响ESD防护能力的前提下,通过串联多级二极管,可以显著提高射频电路的线性度。通过在二极管通路中串联LC谐振网络和大电感,在显著降低射频端口ESD防护电路插入损耗的同时还提高了射频电路的线性度。仿真结果表明,两级串联二极管结构可以将输入1dB压缩点提高至18.9 dBm。在16GHz频点,串联LC谐振网络设计和串联大电感设计分别可以将插入损耗减小0.5dB和0.9dB。Three kinds of ESD protection circuits for RF ports were designed in a 0.18μm SiGe BiCMOS process.The linearity of the RF circuit could be significantly improved through series multistage diodes without affecting the ESD protection capability.Through the series LCresonance network and large inductances in the ESD diode path,the insertion loss of ESD protection circuit in the RF port could be significantly reduced,and the linearity could also be improved.Simulation results showed that the input 1dB compression point could be improved to 18.9dBm through the two-stage series diode structure.At 16GHz,the series LCresonant network design and the series large inductance design could reduce the insertion loss by 0.5dB and 0.9dB,respectively.

关 键 词：射频电路 SiGe BiCMOS ESD防护 插入损耗 

分 类 号：TN433[电子电信—微电子学与固体电子学] TN406